1. Technical Field
The present invention relates to a memory device and a method of driving the same, and more specifically, to a phase change memory device having a multi-level and a method of driving the same.
2. Related Art
Materials chosen for phase change memory devices, such as PRAMs, are those types of materials that are able to be easily and reversibly interconvert between different solid state phases by being subjected or driven by changes in temperature. Another desirable property for materials in future phase change memory devices is that the different solid state phases exhibit measurably different resistances. Due to these and other physiochemical properties, it is thought that phase change materials might be exploited as key constituents in future memory devices which are capable of storing massive amounts of data via correlations between the measured resistances and the corresponding solid state phase of the phase change material.
A typical phase change memory device can be configured to include a plurality of word lines, a plurality of bit lines that intersect the plurality of word lines that define unit memory cells, one switching element that selects the word lines, and variable resistors that receive and store data from the bit lines by the driving of the switching element.
It has been reported that such a phase change memory device can obtain a value of an intermediate state along with binary states, i.e., states that can be correlated with “0” and “1” in accordance to the particular solid state phase of a phase change material layer.
However, the phase change material layer of the currently popular GST group generally exhibit two discrete linear resistance types corresponding to a highly ordered crystalline state and an highly disordered amorphous state. However, the resistance distribution of phase change materials that exhibit intermediate level solid states may be nonlinear.
For this reason, in order to realize a multi-level, a current condition for writing set (0) or reset (1) data and a current having various levels should be supplied to the phase change material. To this end, separate pumping circuits are needed. Although various currents are supplied by the additional pumping circuits, the phase change material layer does not have a clear resistance distribution at levels other than the set and reset levels, such that a reading error can occur.
As a result, there is a problem in that the phase change memory device having the multi-level current is required to have a layout that arranges the plurality of pumping circuits as described above, which cannot obtain the complete multi-level.